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一种卫星导航抗干扰处理器低功耗设计方法
引用本文:潘未庄,王璐,夏效禹.一种卫星导航抗干扰处理器低功耗设计方法[J].全球定位系统,2020,45(1):56-60.
作者姓名:潘未庄  王璐  夏效禹
作者单位:广州海格通信集团股份有限公司,广东广州510663;广州海格通信集团股份有限公司,广东广州510663;广州海格通信集团股份有限公司,广东广州510663
摘    要:提出一种适用于全球卫星导航系统(GNSS)智能天线的低功耗抗干扰处理器设计方法. 通过改进GNSS抗干扰架构中混频器的设计,优化掉数字高中频混频器和滤波器. 为进一步降低功耗和硬件资源占用,引入输出双倍速率寄存器(ODDR)技术,实现高中频信号的直接合成. 实验测试结果表明,本设计功耗降低11%,硬件资源减少14%,可应用到GNSS智能天线系统中. 

关 键 词:全球卫星导航系统  低功耗  抗干扰  抽取  纳奎斯特

A low-power design technique for GNSS anti-jam processor
PAN Weizhuang,WANG Lu,XIA Xiaoyu.A low-power design technique for GNSS anti-jam processor[J].Gnss World of China,2020,45(1):56-60.
Authors:PAN Weizhuang  WANG Lu  XIA Xiaoyu
Affiliation:Guangzhou Haige Communication Group Incorporated Company,Guangzhou 510663, China
Abstract:This paper presents a low-power anti-jamming processor for Global Navigation Satellite System(GNSS) smart antenna. By improving the design of mixer in GNSS anti-interference architecture, the digital high intermediate frequency mixer and filter are optimized. To further reduce the power consumption and resource occupation, an Output Double-Rate-Register(ODDR) scheme is introduced to realize the direct synthesis of high intermediate frequency signal. The experimental results show that the power consumption and hardware resources of this design are reduced by 11% and 14%, which can be applied to GNSS smart antenna system.
Keywords:GNSS  low power  anti-jam  decimation  nyquist
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