| 基于部分可重构技术的AES算法设计与实现 |
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| 引用本文： | 张刚,高献伟,李涛,雷成超.基于部分可重构技术的AES算法设计与实现[J].成都信息工程学院学报,2011,26(1):25-28. |
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| 作者姓名： | 张刚 高献伟 李涛 雷成超 |
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| 作者单位： | 成都信息工程学院计算机学院;北京电子科技学院电子信息工程系; |
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| 基金项目： | 中央办公厅信息安全与保密重点实验室基金资助项目(YZD0809) |
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| 摘 要： | 提出一种基于部分可重构技术的高级加密标准密码算法实现方案。该系统采用Xilinx公司的Virtex-IIFPGA(Field-Programmable Gate Array)芯片,能针对不同的加密与解密需求,灵活重构加密系统中的核心算法,提高了密码系统的灵活性和安全性,减少了资源消耗,适用于资源受限,有不同安全需求的密码系统,最后给出了实验结果。
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| 关 键 词： | 计算机应用技术 信息安全理论与技术 动态重构 高级加密标准 |
Design and Implementation of AES Algorithm Based on Partial Reconstruction Techniques |
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| Zhang Gang,GAO Xian-wei,LI Tao,LEI Xian-chao.Design and Implementation of AES Algorithm Based on Partial Reconstruction Techniques[J].Journal of Chengdu University of Information Technology,2011,26(1):25-28. |
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| Authors: | Zhang Gang GAO Xian-wei LI Tao LEI Xian-chao |
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| Institution: | Zhang Gang1,GAO Xian-wei2,LI Tao1,LEI Xian-chao1(1.School of Computer Science,CUIT,Chengdu 610225,China,2.Beijing Electronic Science and Technology Institute,Beijing 100070,China) |
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| Abstract: | This paper introduces a method based on modular-level reconfigurable Advanced Encryption Standard(AES) cipher algorithm.The designed system using this method addresses the needs of different encryption or decryption by using the Virtex-II Field-Programmable Gate Array(FPGA) chip of Xilinx company,and improves the security or flexibility by dynamically reconfiguring cipher modules. This method is fit for the resources limited or with diverse security needs circumstance.Experiments were done for validation of... |
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| Keywords: | computer application technology information security theory and technology dynamic reconfiguration advanced encryption standard |
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