| 一种改进的计数型TDC设计及实现 |
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| 引用本文： | 王磊,郭唐永,庞聪.一种改进的计数型TDC设计及实现[J].大地测量与地球动力学,2017,37(9):987-990. |
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| 作者姓名： | 王磊 郭唐永 庞聪 |
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| 摘 要： | 基于常规计数型TDC设计思想，通过FPGA芯片的内部PLL延迟相位技术和内部资源构建延迟链改进常规计数型TDC，时间间隔测量精度可达200 ps。该方法对激光测距、三维激光扫描仪、绝对重力仪等仪器中精密时间测量系统的研究具有实际意义。
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| 关 键 词： | 计数法 TDC FPGA技术 Verilog HDL |
A TDC Design Method by Improved Counting Method |
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| WANG Lei,GUO Tangyong,PANG Cong.A TDC Design Method by Improved Counting Method[J].Journal of Geodesy and Geodynamics,2017,37(9):987-990. |
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| Authors: | WANG Lei GUO Tangyong PANG Cong |
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| Abstract: | Design TDC based on the conventional counting TDC method, through use the FPGA chip’s internal PLL phase delay and inner resource build delay chain technology improved TDC by counting method, can get a time interval measurement precision of 200 ps. The method has practical significance in the study of precision time measuring system for laser ranging, 3D laser scanner, and absolute gravimeter instruments. |
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| Keywords: | counting method TDC FPGA technology Verilog HDL |
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